1. Field of the Invention
The present invention relates generally to a metal-insulator-metal (MIM) capacitor. More specifically, the present invention relates to a MIM capacitor having high capacitance density and fabrication method for making the same.
2. Description of the Prior Art
Various capacitive structures are used as electronic elements in integrated circuits such as radio frequency integrated circuits (RFIC), and monolithic microwave integrated circuits (MMIC). Such capacitive structures include, for example, metal-oxide-semiconductor (MOS) capacitors, p-n junction capacitors and metal-insulator-metal (MIM) capacitors. For some applications, MIM capacitors can provide certain advantages over MOS and p-n junction capacitors because the frequency characteristics of MOS and p-n junction capacitors may be restricted as a result of depletion layers that form in the semiconductor electrodes. An MIM capacitor can exhibit improved frequency and temperature characteristics. Furthermore, MIM capacitors are formed in the metal interconnect layers, thereby reducing CMOS transistor process integration interactions or complications.
An MIM capacitor typically includes an insulating layer, such as a PECVD dielectric, disposed between lower and upper electrodes. To increase the circuit density and reduce the cost, large capacitance density is highly desirable. One known method to increase the capacitance density (ε0k/td) is reducing the dielectric thickness (td). However, this attempt is unsuccessful since reducing the dielectric thickness (td) generates undesired high leakage current and poor RF loss tangent.
Another approach to increasing the capacitance density is using high dielectric constant (k) dielectrics for MIM capacitors. For example, U.S. Pat. No. 6,232,197, filed Apr. 7, 1999 by Tsai, assigned to United Microelectronics Corp. discloses a metal-insulator-metal for improved mixed-mode capacitor in a logic circuit. The bottom electrode of the capacitor is polycide and the top electrode is metal. The capacitor dielectric layer may be composed of silicon oxide, silicon nitride, silicon oxy-nitride, or tantalum oxide. Silicon oxide, silicon nitride and silicon oxy-nitride may be formed by using low-pressure chemical vapor deposition (LPCVD), plasma enhanced chemical vapor deposition (PECVD), or high-density plasma CVD (HDPCVD). The thickness of the capacitor dielectric layer is about from 100 to 500 angstroms.
U.S. Pat. No. 6,459,117, filed Nov. 26, 2001 by Liou, assigned to Winbond Electronics Corp. discloses an integrated circuit device with high Q MIM capacitor. The MIM capacitor dielectric layer is formed of silicon oxy-nitride (SiOxNy) which has a high dielectric constant relative to that of silicon dioxide. U.S. Pat. No. 6,468,858, filed Mar. 23, 2001 by Lou, assigned to Taiwan Semiconductor Manufacturing Company discloses a process for forming an MIM capacitor structure. Platinum is employed for both the capacitor top plate and storage node structures. A high dielectric constant material such as Ta2O5 or BaTiO3 is used for the capacitor dielectric layer. The Ta2O5 or BaTiO3 capacitor dielectric layer, which is deposited via chemical vapor deposition (CVD), has a thickness between about 50 to 200 Angstroms.
However, the above-mentioned prior art methods are costly since different dielectric materials are introduced. In light of the forgoing, there is a constant need to provide a new MIM capacitor structure that has high capacitance density and is cost-effective.